Preface to Perf-V

Welcome to the Perf-V world! Based on the spirit of open-sourcing and the original intention of contributing to the RISC-V related communities, we launched the Perf-V project.

As we all know, PerfXLab is a pursuing excellence company that devoutly take “Discovering Potential & Driving Performance” as our gene. Today, this pursuit is not only carried forward at the layer of our software and algorithms, but also extends to the fundamental hardware layer. Originated from the hobby and in-depth understanding on computer architecture, every colleague that participated in this project has been working with great enthusiasm since the birth of Perf-V, aiming to provide the community and developers with a more flexible, more affordable and more suitable RISC-V engineering board.

Today, we introduced the first generation of the Perf-V series based on FPGA——Perf-V Model I, and successfully ported and deployed a number of open source RISC-V cores. We also implemented a lot of application demos as the preliminary examples for all developers better understanding and initiating the development of RISC-V cores and applications. We hope that our efforts would contribute to the development and growth of the RISC-V community. We also expect that the field of computer architecture will eventually step into a new era of “hardware open source 2.0”.